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? semiconductor components industries, llc, 2000 august, 2000 rev. 4 1 publication order number: mc14051b/d mc14051b, mc14052b, mc14053b analog multiplexers/demultiplexers the mc14051b, mc14052b, and mc14053b analog multiplexers are digitallycontrolled analog switches. the mc14051b effectively implements an sp8t solid state switch, the mc14052b a dp4t, and the mc14053b a triple spdt. all three devices feature low on impedance and very low off leakage current. control of analog signals up to the complete supply voltage range can be achieved. ? triple diode protection on control inputs ? switch function is break before make ? supply voltage range = 3.0 vdc to 18 vdc ? analog voltage range (v dd v ee ) = 3.0 to 18 v note: v ee must be v ss ? linearized transfer characteristics ? lownoise 12 nv/ cycle , f 1.0 khz typical ? pinforpin replacement for cd4051, cd4052, and cd4053 ? for 4pdt switch, see mc14551b ? for lower r on , use the hc4051, hc4052, or hc4053 highspeed cmos devices maximum ratings (note 1.) symbol parameter value unit v dd dc supply voltage (referenced to v ee , v ss v ee ) 0.5 to +18.0 v v in , v out input or output voltage range (dc or transient) (referen ced to v ss for control inputs and v ee for switch i/o) 0.5 to v dd + 0.5 v i in input current (dc or transient) per control pin 10 ma i sw switch through current 25 ma p d power dissipation, per package (note 2.) 500 mw t a ambient temperature range 55 to +125 c t stg storage temperature range 65 to +150 c t l lead temperature (8second soldering) 260 c 1. maximum ratings are those values beyond which damage to the device may occur. 2. temperature derating: plastic ap and d/dwo packages: 7.0 mw/ c from 65 c to 125 c this device contains protection circuitry to guard against damage due to high static voltages or electric fields. however, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this highimpedance circuit. for proper operation, v in and v out should be constrained to the range v ss (v in or v out ) v dd . unused inputs must always be tied to an appropriate logic voltage level (e.g., either v ss , v ee or v dd ). unused outputs must be left open. http://onsemi.com xx = specific device code a = assembly location wl, l = wafer lot yy, y = year ww, w = work week marking diagrams 1 16 pdip16 p suffix case 648 mc140xxbcp awlyyww soic16 d suffix case 751b 1 16 140xxb awlyww soeiaj16 f suffix case 966 1 16 mc140xxb alyw tssop16 dt suffix case 948f 14 0xxb alyw 1 16 see detailed ordering and shipping information in the package dimensions section on page 12 of this data sheet. ordering information
mc14051b, mc14052b, mc14053b http://onsemi.com 2 mc14051b 8channel analog multiplexer/demultiplexer mc14052b dual 4channel analog multiplexer/demultiplexer mc14053b triple 2channel analog multiplexer/demultiplexer v dd = pin 16 v ss = pin 8 v ee = pin 7 note: control inputs referenced to v ss , analog inputs and outputs reference to v ee . v ee must be v ss . inhibit a b c x0 x1 x2 x3 x4 x5 x6 x7 x 4 2 5 1 12 15 14 13 9 10 11 6 controls switches in/out common out/in 3 4 2 5 1 11 15 14 12 9 10 6 controls switches in/out 13 3 commons out/in x y v dd = pin 16 v ss = pin 8 v ee = pin 7 3 5 1 2 13 12 9 10 11 6 controls switches in/out 14 15 4 x y z commons out/in v dd = pin 16 v ss = pin 8 v ee = pin 7 inhibit a b x0 x1 x2 x3 y0 y1 y2 y3 inhibit a b c x0 y0 y1 z0 z1 x1 pin assigment mc14051b mc14052b mc14053b 13 14 15 16 9 10 11 12 5 4 3 2 1 8 7 6 x3 x0 x1 x2 v dd c b a x7 x x6 x4 v ss v ee inh x5 13 14 15 16 9 10 11 12 5 4 3 2 1 8 7 6 x0 x x1 x2 v dd b a x3 y3 y y2 y0 v ss v ee inh y1 13 14 15 16 9 10 11 12 5 4 3 2 1 8 7 6 x0 x1 x y v dd c b a z z1 y0 y1 v ss v ee inh z0
mc14051b, mc14052b, mc14053b http://onsemi.com 3 ????????????????????????????????? ????????????????????????????????? electrical characteristics ???????? ???????? ???? ???? ?? ?? ??????? ??????? ????? ????? 55 c ??????? ??????? 25 c ????? ????? 125 c ?? ?? ???????? ???????? characteristic ???? ???? symbol ?? ?? v dd ??????? ??????? test conditions ??? ??? min ??? ??? max ?? ?? min ???? ???? typ (3.) ??? ??? max ??? ??? min ??? ??? max ?? ?? unit ????????????????????????????????? ????????????????????????????????? supply requirements (voltages referenced to v ee ) ???????? ???????? power supply voltage range ???? ???? v dd ?? ?? e ??????? ??????? v dd 3.0 v ss v ee ??? ??? 3.0 ??? ??? 18 ?? ?? 3.0 ???? ???? e ??? ??? 18 ??? ??? 3.0 ??? ??? 18 ?? ?? v ???????? ? ?????? ? ? ?????? ? ? ?????? ? ???????? quiescent current per package ???? ? ?? ? ? ?? ? ? ?? ? ???? i dd ?? ?? ?? ?? ?? 5.0 10 15 ??????? ? ????? ? ? ????? ? ? ????? ? ??????? control inputs: v in = v ss or v dd , switch i/o: v ee v i/o v dd , and d v switch 500 mv (4.) ??? ? ? ? ? ? ? ? ? ? ??? e e e ??? ? ? ? ? ? ? ? ? ? ??? 5.0 10 20 ?? ?? ?? ?? ?? e e e ???? ? ?? ? ? ?? ? ? ?? ? ???? 0.005 0.010 0.015 ??? ? ? ? ? ? ? ? ? ? ??? 5.0 10 20 ??? ? ? ? ? ? ? ? ? ? ??? e e e ??? ? ? ? ? ? ? ? ? ? ??? 150 300 600 ?? ?? ?? ?? ?? m a ???????? ? ?????? ? ? ?????? ? ???????? total supply current (dynamic plus quiescent, per package ???? ? ?? ? ? ?? ? ???? i d(av) ?? ?? ?? ?? 5.0 10 15 ??????? ? ????? ? ? ????? ? ??????? t a = 25 c only (the channel component, (v in v out )/r on , is not included.) ??????????????? ? ????????????? ? ? ????????????? ? ??????????????? (0.07 m a/khz) f + i dd typical (0.20 m a/khz) f + i dd (0.36 m a/khz) f + i dd ?? ?? ?? ?? m a ????????????????????????????????? ????????????????????????????????? control inputs e inhibit, a, b, c (voltages referenced to v ss ) ???????? ? ?????? ? ???????? lowlevel input voltage ???? ? ?? ? ???? v il ?? ?? ?? 5.0 10 15 ??????? ? ????? ? ??????? r on = per spec, i off = per spec ??? ? ? ? ??? e e e ??? ? ? ? ??? 1.5 3.0 4.0 ?? ?? ?? e e e ???? ? ?? ? ???? 2.25 4.50 6.75 ??? ? ? ? ??? 1.5 3.0 4.0 ??? ? ? ? ??? e e e ??? ? ? ? ??? 1.5 3.0 4.0 ?? ?? ?? v ???????? ? ?????? ? ? ?????? ? ???????? highlevel input voltage ???? ? ?? ? ? ?? ? ???? v ih ?? ?? ?? ?? 5.0 10 15 ??????? ? ????? ? ? ????? ? ??????? r on = per spec, i off = per spec ??? ? ? ? ? ? ? ??? 3.5 7.0 11 ??? ? ? ? ? ? ? ??? e e e ?? ?? ?? ?? 3.5 7.0 11 ???? ? ?? ? ? ?? ? ???? 2.75 5.50 8.25 ??? ? ? ? ? ? ? ??? e e e ??? ? ? ? ? ? ? ??? 3.5 7.0 11 ??? ? ? ? ? ? ? ??? e e e ?? ?? ?? ?? v ???????? ???????? input leakage current ???? ???? i in ?? ?? 15 ??????? ??????? v in = 0 or v dd ??? ??? e ??? ??? 0.1 ?? ?? e ???? ???? 0.00001 ??? ??? 0.1 ??? ??? e ??? ??? 1.0 ?? ?? m a ???????? ???????? input capacitance ???? ???? c in ?? ?? e ??????? ??????? ??? ??? e ??? ??? e ?? ?? e ???? ???? 5.0 ??? ??? 7.5 ??? ??? e ??? ??? e ?? ?? pf ????????????????????????????????? switches in/out and commons out/in e x, y, z (voltages referenced to v ee ) ???????? ? ?????? ? ? ?????? ? ???????? recommended peaktopeak voltage into or out of the switch ???? ? ?? ? ? ?? ? ???? v i/o ?? ?? ?? ?? e ??????? ? ????? ? ? ????? ? ??????? channel on or off ??? ? ? ? ? ? ? ??? 0 ??? ? ? ? ? ? ? ??? v dd ?? ?? ?? ?? 0 ???? ? ?? ? ? ?? ? ???? e ??? ? ? ? ? ? ? ??? v dd ??? ? ? ? ? ? ? ??? 0 ??? ? ? ? ? ? ? ??? v dd ?? ?? ?? ?? v pp ???????? ? ?????? ? ???????? recommended static or dynamic voltage across the switch (4.) (figure 5) ???? ? ?? ? ???? d v switch ?? ?? ?? e ??????? ? ????? ? ??????? channel on ??? ? ? ? ??? 0 ??? ? ? ? ??? 600 ?? ?? ?? 0 ???? ? ?? ? ???? e ??? ? ? ? ??? 600 ??? ? ? ? ??? 0 ??? ? ? ? ??? 300 ?? ?? ?? mv ???????? ???????? output offset voltage ???? ???? v oo ?? ?? e ??????? ??????? v in = 0 v, no load ??? ??? e ??? ??? e ?? ?? e ???? ???? 10 ??? ??? e ??? ??? e ??? ??? e ?? ?? m v ???????? ? ?????? ? ? ?????? ? ???????? on resistance ???? ? ?? ? ? ?? ? ???? r on ?? ?? ?? ?? 5.0 10 15 ??????? ? ????? ? ? ????? ? ??????? d v switch 500 mv (4.) v in = v il or v ih (control), and v in = 0 to v dd (switch) ??? ? ? ? ? ? ? ??? e e e ??? ? ? ? ? ? ? ??? 800 400 220 ?? ?? ?? ?? e e e ???? ? ?? ? ? ?? ? ???? 250 120 80 ??? ? ? ? ? ? ? ??? 1050 500 280 ??? ? ? ? ? ? ? ??? e e e ??? ? ? ? ? ? ? ??? 1200 520 300 ?? ?? ?? ?? w ???????? ? ?????? ? ???????? d on resistance between any two channels in the same package ???? ? ?? ? ???? d r on ?? ?? ?? 5.0 10 15 ??????? ? ????? ? ??????? ??? ? ? ? ??? e e e ??? ? ? ? ??? 70 50 45 ?? ?? ?? e e e ???? ? ?? ? ???? 25 10 10 ??? ? ? ? ??? 70 50 45 ??? ? ? ? ??? e e e ??? ? ? ? ??? 135 95 65 ?? ?? ?? w ???????? ? ?????? ? ? ?????? ? ???????? offchannel leakage current (figure 10) ???? ? ?? ? ? ?? ? ???? i off ?? ?? ?? ?? 15 ??????? ? ????? ? ? ????? ? ??????? v in = v il or v ih (control) channel to channel or any one channel ??? ? ? ? ? ? ? ??? e ??? ? ? ? ? ? ? ??? 100 ?? ?? ?? ?? e ???? ? ?? ? ? ?? ? ???? 0.05 ??? ? ? ? ? ? ? ??? 100 ??? ? ? ? ? ? ? ??? e ??? ? ? ? ? ? ? ??? 1000 ?? ?? ?? ?? na ???????? ???????? capacitance, switch i/o ???? ???? c i/o ?? ?? e ??????? ??????? inhibit = v dd ??? ??? e ??? ??? e ?? ?? e ???? ???? 10 ??? ??? e ??? ??? e ??? ??? e ?? ?? pf ???????? ? ?????? ? ? ?????? ? ???????? capacitance, common o/i ???? ? ?? ? ? ?? ? ???? c o/i ?? ?? ?? ?? e ??????? ? ????? ? ? ????? ? ??????? inhibit = v dd (mc14051b) (mc14052b) (mc14053b) ??? ? ? ? ? ? ? ??? e e e ??? ? ? ? ? ? ? ??? e e e ?? ?? ?? ?? e e e ???? ? ?? ? ? ?? ? ???? 60 32 17 ??? ? ? ? ? ? ? ??? e e e ??? ? ? ? ? ? ? ??? e e e ??? ? ? ? ? ? ? ??? e e e ?? ?? ?? ?? pf ???????? ? ?????? ? ???????? capacitance, feedthrough (channel off) ???? ? ?? ? ???? c i/o ?? ?? ?? e e ??????? ? ????? ? ??????? pins not adjacent pins adjacent ??? ? ? ? ??? e e ??? ? ? ? ??? e e ?? ?? ?? e e ???? ? ?? ? ???? 0.15 0.47 ??? ? ? ? ??? e e ??? ? ? ? ??? e e ??? ? ? ? ??? e e ?? ?? ?? pf 3. data labeled atypo is not to be used for design purposes, but is intended as an indication of the ic's potential performance. 4. for voltage drops across the switch ( d v switch ) > 600 mv ( > 300 mv at high temperature), excessive v dd current may be drawn, i.e. the current out of the switch may contain both v dd and switch input components. the reliability of the device will be unaffected unless the maximum ratings are exceeded. (see first page of this data sheet.)
mc14051b, mc14052b, mc14053b http://onsemi.com 4 ????????????????????????????????? ????????????????????????????????? electrical characteristics (5.) (c l = 50 pf, t a = 25 c) (v ee v ss unless otherwise indicated) ??????????????? ??????????????? characteristic ????? ????? symbol ????? ????? v dd v ee vdc ????? ????? typ (6.) all types ????? ????? max ??? ??? unit ??????????????? ? ????????????? ? ? ????????????? ? ? ????????????? ? ??????????????? propagation delay times (figure 6) switch input to switch output (r l = 10 k w ) mc14051 t plh , t phl = (0.17 ns/pf) c l + 26.5 ns t plh , t phl = (0.08 ns/pf) c l + 11 ns t plh , t phl = (0.06 ns/pf) c l + 9.0 ns ????? ? ??? ? ? ??? ? ? ??? ? ????? t plh , t phl ????? ? ??? ? ? ??? ? ? ??? ? ????? 5.0 10 15 ????? ? ??? ? ? ??? ? ? ??? ? ????? 35 15 12 ????? ? ??? ? ? ??? ? ? ??? ? ????? 90 40 30 ??? ? ? ? ? ? ? ? ? ? ??? ns ??????????????? ? ????????????? ? ? ????????????? ? ??????????????? mc14052 t plh , t phl = (0.17 ns/pf) c l + 21.5 ns t plh , t phl = (0.08 ns/pf) c l + 8.0 ns t plh , t phl = (0.06 ns/pf) c l + 7.0 ns ????? ? ??? ? ? ??? ? ????? ????? ? ??? ? ? ??? ? ????? 5.0 10 15 ????? ? ??? ? ? ??? ? ????? 30 12 10 ????? ? ??? ? ? ??? ? ????? 75 30 25 ??? ? ? ? ? ? ? ??? ns ??????????????? ? ????????????? ? ? ????????????? ? ??????????????? mc14053 t plh , t phl = (0.17 ns/pf) c l + 16.5 ns t plh , t phl = (0.08 ns/pf) c l + 4.0 ns t plh , t phl = (0.06 ns/pf) c l + 3.0 ns ????? ? ??? ? ? ??? ? ????? ????? ? ??? ? ? ??? ? ????? 5.0 10 15 ????? ? ??? ? ? ??? ? ????? 25 8.0 6.0 ????? ? ??? ? ? ??? ? ????? 65 20 15 ??? ? ? ? ? ? ? ??? ns ??????????????? ? ????????????? ? ? ????????????? ? ? ????????????? ? ??????????????? inhibit to output (r l = 10 k w , v ee = v ss ) output a1o or a0o to high impedance, or high impedance to a1o or a0o level mc14051b ????? ? ??? ? ? ??? ? ? ??? ? ????? t phz , t plz , t pzh , t pzl ????? ? ??? ? ? ??? ? ? ??? ? ????? 5.0 10 15 ????? ? ??? ? ? ??? ? ? ??? ? ????? 350 170 140 ????? ? ??? ? ? ??? ? ? ??? ? ????? 700 340 280 ??? ? ? ? ? ? ? ? ? ? ??? ns ??????????????? ? ????????????? ? ??????????????? mc14052b ????? ? ??? ? ????? ????? ? ??? ? ????? 5.0 10 15 ????? ? ??? ? ????? 300 155 125 ????? ? ??? ? ????? 600 310 250 ??? ? ? ? ??? ns ??????????????? ? ????????????? ? ??????????????? mc14053b ????? ? ??? ? ????? ????? ? ??? ? ????? 5.0 10 15 ????? ? ??? ? ????? 275 140 110 ????? ? ??? ? ????? 550 280 220 ??? ? ? ? ??? ns ??????????????? ? ????????????? ? ? ????????????? ? ??????????????? control input to output (r l = 10 k w , v ee = v ss ) mc14051b ????? ? ??? ? ? ??? ? ????? t plh , t phl ????? ? ??? ? ? ??? ? ????? 5.0 10 15 ????? ? ??? ? ? ??? ? ????? 360 160 120 ????? ? ??? ? ? ??? ? ????? 720 320 240 ??? ? ? ? ? ? ? ??? ns ??????????????? ? ????????????? ? ? ????????????? ? ??????????????? mc14052b ????? ? ??? ? ? ??? ? ????? ????? ? ??? ? ? ??? ? ????? 5.0 10 15 ????? ? ??? ? ? ??? ? ????? 325 130 90 ????? ? ??? ? ? ??? ? ????? 650 260 180 ??? ? ? ? ? ? ? ??? ns ??????????????? ? ????????????? ? ? ????????????? ? ??????????????? mc14053b ????? ? ??? ? ? ??? ? ????? ????? ? ??? ? ? ??? ? ????? 5.0 10 15 ????? ? ??? ? ? ??? ? ????? 300 120 80 ????? ? ??? ? ? ??? ? ????? 600 240 160 ??? ? ? ? ? ? ? ??? ns ??????????????? ??????????????? second harmonic distortion (r l = 10k w , f = 1 khz) v in = 5 v pp ????? ????? e ????? ????? 10 ????? ????? 0.07 ????? ????? e ??? ??? % ??????????????? ? ????????????? ? ??????????????? bandwidth (figure 7) (r l = 1 k w , v in = 1/2 (v dd v ee ) pp, c l = 50pf 20 log (v out /v in ) = 3 db) ????? ? ??? ? ????? bw ????? ? ??? ? ????? 10 ????? ? ??? ? ????? 17 ????? ? ??? ? ????? e ??? ? ? ? ??? mhz ??????????????? ? ????????????? ? ? ????????????? ? ? ????????????? ? ??????????????? off channel feedthrough attenuation (figure 7) r l = 1k w , v in = 1/2 (v dd v ee ) pp f in = 4.5 mhz e mc14051b f in = 30 mhz e mc14052b f in = 55 mhz e mc14053b ????? ? ??? ? ? ??? ? ? ??? ? ????? e ????? ? ??? ? ? ??? ? ? ??? ? ????? 10 ????? ? ??? ? ? ??? ? ? ??? ? ????? 50 ????? ? ??? ? ? ??? ? ? ??? ? ????? e ??? ? ? ? ? ? ? ? ? ? ??? db ??????????????? ? ????????????? ? ??????????????? channel separation (figure 8) (r l = 1 k w , v in = 1/2 (v dd v ee ) pp, f in = 3.0 mhz ????? ? ??? ? ????? e ????? ? ??? ? ????? 10 ????? ? ??? ? ????? 50 ????? ? ??? ? ????? e ??? ? ? ? ??? db ??????????????? ? ????????????? ? ??????????????? crosstalk, control input to common o/i (figure 9) (r 1 = 1 k w , r l = 10 k w control t tlh = t thl = 20 ns, inhibit = v ss ) ????? ? ??? ? ????? e ????? ? ??? ? ????? 10 ????? ? ??? ? ????? 75 ????? ? ??? ? ????? e ??? ? ? ? ??? mv 5. the formulas given are for the typical characteristics only at 25 c. 6. data labelled atypo is not lo be used for design purposes but in intended as an indication of the ic's potential performance.
mc14051b, mc14052b, mc14053b http://onsemi.com 5 figure 1. switch circuit schematic in/out level converted control v dd v ee v dd v dd v dd out/in v ee in/out out/in control truth table control inputs select on switches inhibit c* b a mc14051b mc14052b mc14053b 0 0 0 0 x0 y0 x0 z0 y0 x0 0 0 01 x1 y1 x1 z0 y0 x1 0 0 10 x2 y2 x2 z0 y1 x0 0 0 11 x3 y3 x3 z0 y1 x1 0 1 0 0 x4 z1 y0 x0 0 1 01 x5 z1 y0 x1 0 1 10 x6 z1 y1 x0 0 1 11 x7 z1 y1 x1 1 x x x none none none *not applicable for mc14052 x = don't care figure 3. mc14052b functional diagram figure 4. mc14053b functional diagram 16 v dd 8v ss 7v ee 13x 3y binary to 1-of-4 decoder with inhibit level converter inh6 a10 b9 x012 x114 x215 x311 y01 y15 y22 y34 binary to 1-of-2 decoder with inhibit level converter 16 v dd 8v ss 7v ee 14x 15y 4z inh6 a11 b10 c9 x012 x113 y02 y11 z05 z13 figure 2. mc14051b functional diagram inh6 a11 b10 c9 x013 x114 x215 x312 x41 x55 x62 x74 8v ss 7v ee 16 v dd 3x binary to 1-of-8 decoder with inhibit level converter
mc14051b, mc14052b, mc14053b http://onsemi.com 6 test circuits figure 5. d v across switch figure 6. propagation delay times, control and inhibit to output figure 7. bandwidth and offchannel feedthrough attenuation figure 8. channel separation (adjacent channels used for setup) figure 9. crosstalk, control input to common o/i figure 10. off channel leakage control section of ic source v on switch pulse generator inh a b c r l c l v out v dd v ee v ee v dd inh a b c v ss v in r l c l = 50 pf v out v dd - v ee 2 inh a b c off on r l r l c l = 50 pf v out v in v dd - v ee 2 inh a b c r1 r l c l = 50 pf v out control section of ic off channel under test other channel(s) common v dd v ee v ee v dd v ee v dd note: see also figures 7 and 8 in the mc14016b data sheet. a, b, and c inputs used to turn on or off the switch under test. load
mc14051b, mc14052b, mc14053b http://onsemi.com 7 figure 11. channel resistance (r on ) test circuit v dd v ee = v ss 10 k v dd keithley 160 digital multimeter 1 k w range x-y plotter typical resistance characteristics figure 12. v dd = 7.5 v, v ee = 7.5 v figure 13. v dd = 5.0 v, v ee = 5.0 v r on , on" resistance (ohms) 350 300 250 200 150 100 0 50 -8.0 -10 -6.0 -4.0 -2.0 0 0.2 4.0 6.0 8.0 10 v in , input voltage (volts) t a = 125 c 25 c -55 c r on , on" resistance (ohms) 350 300 250 200 150 100 0 50 -8.0 -10 -6.0 -4.0 -2.0 0 0.2 4.0 6.0 8.0 10 v in , input voltage (volts) t a = 125 c 25 c -55 c figure 14. v dd = 2.5 v, v ee = 2.5 v r on , on" resistance (ohms) 700 600 500 400 300 200 0 100 -8.0 -10 -6.0 -4.0 -2.0 0 0.2 4.0 6.0 8.0 10 v in , input voltage (volts) t a = 125 c 25 c -55 c figure 15. comparison at 25 c, v dd = v ee r on , on" resistance (ohms) 350 300 250 200 150 100 0 50 -8.0 -10 -6.0 -4.0 -2.0 0 0.2 4.0 6.0 8.0 10 v in , input voltage (volts) t a = 25 c v dd = 2.5 v 5.0 v 7.5 v
mc14051b, mc14052b, mc14053b http://onsemi.com 8 applications information figure a illustrates use of the onchip level converter detailed in figures 2, 3, and 4. the 0to5 v digital control signal is used to directly control a 9 v pp analog signal. the digital control logic levels are determined by v dd and v ss . the v dd voltage is the logic high voltage; the v ss voltage is logic low. for the example, v dd = + 5 v = logic high at the control inputs; v ss = gnd = 0 v = logic low. the maximum analog signal level is determined by v dd and v ee . the v dd voltage determines the maximum recommended peak above v ss . the v ee voltage determines the maximum swing below v ss . for the example, v dd v ss = 5 v maximum swing above v ss ; v ss v ee = 5 v maximum swing below v ss . the example shows a 4.5 v signal which allows a 1/2 volt margin at each peak. if voltage transients above v dd and/or below v ee are anticipated on the analog channels, external diodes (dx) are recommended as shown in figure b. these diodes should be small signal types able to absorb the maximum anticipated current surges during clipping. the absolute maximum potential difference between v dd and v ee is 18.0 v. most parameters are specified up to 15 v which is the recommended maximum difference between v dd and v ee . balanced supplies are not required. however, v ss must be greater than or equal to v ee . for example, v dd = + 10 v, v ss = + 5 v, and v ee 3 v is acceptable. see the table below. figure a. application example +5 v -5 v v dd v ss v ee 9 v p-p analog signal 0-to-5 v digital control signals switch i/o inhibit, a, b, c common o/i 9 v p-p analog signal + 4.5 v 4.5 v gnd +5 v external cmos digital circuitry mc14051b mc14052b mc14053b figure b. external germanium or schottky clipping diodes v dd v dd v ee v ee d x d x d x d x analog i/o common o/i ????????????????????????? ????????????????????????? possible supply connections ???? ? ?? ? ? ?? ? ???? v dd in volts ????? ? ??? ? ? ??? ? ????? v ss in volts ???? ? ?? ? ? ?? ? ???? v ee in volts ??????? ? ????? ? ? ????? ? ??????? control inputs logic high/logic low in volts ????????? ? ??????? ? ? ??????? ? ????????? maximum analog signal range in volts ???? ???? + 8 ????? ????? 0 ???? ???? 8 ??????? ??????? + 8/0 ????????? ????????? + 8 to 8 = 16 v pp ???? ???? + 5 ????? ????? 0 ???? ???? 12 ??????? ??????? + 5/0 ????????? ????????? + 5 to 12 = 17 v pp ???? ???? + 5 ????? ????? 0 ???? ???? 0 ??????? ??????? + 5/0 ????????? ????????? + 5 to 0 = 5 v pp ???? ???? + 5 ????? ????? 0 ???? ???? 5 ??????? ??????? + 5/0 ????????? ????????? + 5 to 5 = 10 v pp ???? ???? + 10 ????? ????? + 5 ???? ???? 5 ??????? ??????? + 10/ + 5 ????????? ????????? + 10 to 5 = 15 v pp
mc14051b, mc14052b, mc14053b http://onsemi.com 9 package dimensions pdip16 p suffix plastic dip package case 64808 issue r notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of leads when formed parallel. 4. dimension b does not include mold flash. 5. rounded corners optional. a b f c s h g d j l m 16 pl seating 18 9 16 k plane t m a m 0.25 (0.010) t dim min max min max millimeters inches a 0.740 0.770 18.80 19.55 b 0.250 0.270 6.35 6.85 c 0.145 0.175 3.69 4.44 d 0.015 0.021 0.39 0.53 f 0.040 0.70 1.02 1.77 g 0.100 bsc 2.54 bsc h 0.050 bsc 1.27 bsc j 0.008 0.015 0.21 0.38 k 0.110 0.130 2.80 3.30 l 0.295 0.305 7.50 7.74 m 0 10 0 10 s 0.020 0.040 0.51 1.01 soic16 d suffix plastic soic package case 751b05 issue j notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 18 16 9 seating plane f j m r x 45 g 8 pl p b a m 0.25 (0.010) b s t d k c 16 pl s b m 0.25 (0.010) a s t dim min max min max inches millimeters a 9.80 10.00 0.386 0.393 b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.054 0.068 d 0.35 0.49 0.014 0.019 f 0.40 1.25 0.016 0.049 g 1.27 bsc 0.050 bsc j 0.19 0.25 0.008 0.009 k 0.10 0.25 0.004 0.009 m 0 7 0 7 p 5.80 6.20 0.229 0.244 r 0.25 0.50 0.010 0.019
mc14051b, mc14052b, mc14053b http://onsemi.com 10 package dimensions tssop16 dt suffix plastic tssop package case 948f01 issue o ??? ??? dim min max min max inches millimeters a 4.90 5.10 0.193 0.200 b 4.30 4.50 0.169 0.177 c --- 1.20 --- 0.047 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.65 bsc 0.026 bsc h 0.18 0.28 0.007 0.011 j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.19 0.30 0.007 0.012 k1 0.19 0.25 0.007 0.010 l 6.40 bsc 0.252 bsc m 0 8 0 8 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash. protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane -w-. section nn seating plane ident. pin 1 1 8 16 9 detail e j j1 b c d a k k1 h g detail e f m l 2x l/2 u s u 0.15 (0.006) t s u 0.15 (0.006) t s u m 0.10 (0.004) v s t 0.10 (0.004) t v w 0.25 (0.010) 16x ref k n n
mc14051b, mc14052b, mc14053b http://onsemi.com 11 package dimensions h e a 1 dim min max min max inches --- 2.05 --- 0.081 millimeters 0.05 0.20 0.002 0.008 0.35 0.50 0.014 0.020 0.18 0.27 0.007 0.011 9.90 10.50 0.390 0.413 5.10 5.45 0.201 0.215 1.27 bsc 0.050 bsc 7.40 8.20 0.291 0.323 0.50 0.85 0.020 0.033 1.10 1.50 0.043 0.059 0 0.70 0.90 0.028 0.035 --- 0.78 --- 0.031 a 1 h e q 1 l e 10 0 10 l e q 1 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions d and e do not include mold flash or protrusions and are measured at the parting line. mold flash or protrusions shall not exceed 0.15 (0.006) per side. 4. terminal numbers are shown for reference only. 5. the lead width dimension (b) does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the lead width dimension at maximum material condition. dambar cannot be located on the lower radius or the foot. minimum space between protrusions and adjacent lead to be 0.46 ( 0.018). m l detail p view p c a b e m 0.13 (0.005) 0.10 (0.004) 1 16 9 8 d z e a b c d e e l m z soeiaj16 f suffix plastic eiaj soic package case 96601 issue o
mc14051b, mc14052b, mc14053b http://onsemi.com 12 ordering & shipping information: device package shipping mc14051bcp pdip16 2000 units per box mc14051bd soic16 48 units per rail mc14051bdr2 soic16 2500 units / tape & reel mc14051bdt tssop16 96 units per rail mc14051bdtel tssop16 2000 units / tape & reel mc14051bdtr2 tssop16 2500 units / tape & reel mc14051bf soeiaj16 see note 7. mc14051bfel soeiaj16 see note 7. mc14052bcp pdip16 2000 units per box mc14052bd soic16 48 units per rail mc14052bdr2 soic16 2500 units / tape & reel mc14052bdt tssop16 96 units per rail mc14052bdtr2 tssop16 2500 units / tape & reel mc14052bf soeiaj16 see note 7. mc14052bfel soeiaj16 see note 7. ordering & shipping information: mc14053bcp pdip16 2000 units per box mc14053bd soic16 48 units per rail mc14053bdr2 soic16 2500 units / tape & reel mc14053bdt tssop16 96 units per rail mc14053bdtel tssop16 2000 units / tape & reel mc14053bdtr2 tssop16 2500 units / tape & reel mc14053bf soeiaj16 see note 7. mc14053bfel soeiaj16 see note 7. 7. for ordering information on the eiaj version of the soic packages, please contact your local on semiconductor rep- resentative. on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information central/south america: spanish phone : 3033087143 (monfri 8:00am to 5:00pm mst) email : onlitspanish@hibbertco.com asia/pacific : ldc for on semiconductor asia support phone : 3036752121 (tuefri 9:00am to 1:00pm, hong kong time) toll free from hong kong & singapore: 00180044223781 email : onlitasia@hibbertco.com japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402745 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. mc14051b/d north america literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com fax response line: 3036752167 or 8003443810 toll free usa/canada n. american technical support : 8002829855 toll free usa/canada europe: ldc for on semiconductor european support german phone : (+1) 3033087140 (monfri 2:30pm to 7:00pm cet) email : onlitgerman@hibbertco.com french phone : (+1) 3033087141 (monfri 2:00pm to 7:00pm cet) email : onlitfrench@hibbertco.com english phone : (+1) 3033087142 (monfri 12:00pm to 5:00pm gmt) email : onlit@hibbertco.com european tollfree access*: 0080044223781 *available from germany, france, italy, uk

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